Teradyne Announces New Catalyst Family Member at the International Test Conference -- the Catalyst FC
3 October 2000
Teradyne Announces New Catalyst Family Member at the International Test Conference -- the Catalyst FC
ATLANTIC CITY, N.J.--Oct. 3, 2000--Focused Configuration Catalyst Provides Lowest Cost of Test for RF and
Automotive Markets with 64 Pins
SPECIAL TO THE INTERNATIONAL TEST CONFERENCE -- Teradyne, Inc. broadened its leading Catalyst Family of testers again by today announcing the availability of its newest Catalyst Family member, the Catalyst FC. The announcement was made at ITC where Catalyst quad-site testing and Catalyst Tiger digital testing demonstrations are being presented daily. (See Booth 903.) Catalyst FC -- along with Catalyst LC, Catalyst, and Catalyst Tiger -- expand the Catalyst Family of testers, making Catalyst the only ATE platform available that covers such a wide spectrum of test performance and functionality at the lowest cost of test.
"Catalyst FC offers the same level of advanced analog and mix-signal instrumentation as Catalyst LC, Catalyst, and Catalyst Tiger. But with just 64 digital pins, the focused configuration provides cutting-edge wireless/RF and automotive testing capabilities with the best cost of test. Catalyst FC is also compatible with Teradyne's world-standard operating software, IMAGE(TM) as well as Catalyst LC, Catalyst and Catalyst Tiger," said Dave Derian, Catalyst Product Manager at Teradyne.
Catalyst FC maximizes Bluetooth(TM) wireless device testing with Teradyne's MicroWAVE6000(TM) instrumentation suite, which is designed for the high growth cellular phone market and new wireless communications standards. "Catalyst FC is well suited for markets with lower digital pin count requirements, such as certain devices in wireless/RF and automotive markets," Derian added. "Catalyst FC out-performs other platforms with faster testing, using Teradyne's quad-site test capabilities on most Bluetooth transceiver devices."
Pricing and Availability
Catalyst FC begins shipping Q400 with prices starting under $650,000.
About the Catalyst Family
The leading system-on-a-chip test system with more than 700 systems booked worldwide, Catalyst tests DSL, set top box, DVD, cellular, graphics, LAN, power management, PRML, and microwave devices. With a range of digital pin offerings, the Catalyst Family provides the best and most efficient and cost effective level of test suitable for advanced mixed-signal and SOC testing: Catalyst FC provides 64 digital pins; Catalyst LC provides 128 pins; Catalyst provides 384 pins, and Catalyst Tiger provides 1024 pins.
The Catalyst SOC test family reduces time-to-market and test cost through state-of-the-art instrumentation, including the MicroWAVE6000, Gazelle, 1.5 ps jitter PicoClock(TM), and the new Time Jitter Analyzer with 5 ps jitter high speed time sampling instrumentation. Catalyst digital is available from 25 MHz to 1600 Mbps I/O and from 16 to 1024 pins to match wide device needs and parallel test configurations.
Catalyst Tiger, introduced this summer and showcased for the first time at Semicon West is an extension of the Catalyst family for high performance, high pin count, or high parallel site count applications. Breakthrough Silicon Germanium (SiGe) technology provides high data rate, full I/O, and timing changes on the fly at top speed required for chipset, networking, and disk SOC devices. Catalyst Tiger is the first SOC test system to break the 1 Gbps barrier. The same Zero Time DSP architecture that makes Catalyst the world SOC test economic leader enables Tiger to easily handle quad and octal site test for new one chip / one product SOC devices. Aimed initially at high pin count chipset and network switching devices, Tiger sets the new standard for SOC test: 1024 single ended or differential pins, device focused programming with timing, format, and I/O changes at full speed, integrated precision analog, ultra low jitter clocks, and high-speed time digitizing on any pin.
With IMAGE(TM) test engineering software linked to design through VX software, Catalyst users enjoy a comprehensive development environment. VX qualifies the device design model and test methods before first silicon by closing the loop between design and test simulation. IMAGE provides a template driven programming environment for test IP portability and also includes direct hardware control for custom method authoring. Full parallel test support combined with a unique parallel processing background DSP environment speeds production throughput, improving capital utilization. Coupled with multiple time domain operation in Catalyst, IMAGE now introduces parallel cell test, asynchronous test within the IC itself, driving test time down even further.
About Teradyne
Teradyne is the world's largest supplier of automatic test equipment and related software for the electronics and telecommunications industries and a leading supplier of high-performance backplane assemblies and connectors. Teradyne supports its products through an extensive service and applications engineering network, with technical centers located throughout the United States, Europe, and the Pacific Rim. Headquartered in Boston, Massachusetts, Teradyne reported sales of approximately $1.8 billion in 1999 and currently has more than 8,500 employees worldwide. Teradyne's World Wide Web address is www.teradyne.com.
PicoClock, IMAGE and MicroWAVE6000 are trademarks of Teradyne, Inc. Bluetooth is a trademark owned by Telefonaktiebolaget LM Ericsson, Sweden.