STMicroelectronics Announces Microcontroller Core Targeting Disk Drive
2 October 2000
STMicroelectronics Announces DSP-Enhanced ST10 Microcontroller Core Targeting Disk Drive, Automotive and Consumer Applications
GENEVA--Sept. 29, 2000--New core more than doubles performance of proven ST10 architecture and allows re-use of existing software in demanding new applications
STMicroelectronics today introduced a highly advanced evolution of the ST10 microcontroller core which employs a new architecture that allows most instructions to be executed in one cycle, more than doubling the execution speed at a given clock speed. In addition, it adds digital signal processor (DSP) instructions optimized for real-time control applications. Called Super10, the new DSP-MCU core brings a significant gain in performance and maintains code compatibility with standard ST10 cores, allowing the re-use of existing software investments in newer, more advanced system-on-chip applications.
The Super10 core primarily targets control applications in hard disk drives, automotive and consumer where DSP algorithms are needed to achieve the required performance. In a hard disk drive, for example, the addition of a true DSP and advanced interrupt handling with fast context switching means that the Super10 core can efficiently support the higher frequency of interrupts required by new concepts such as two-stage head positioning servos, where fine tracking is performed using a microactuator on the head suspension.
Fast response to interrupts is achieved due to two local register banks in the Super10 core which offer zero cycle context switching capability. Moreover, the Super10 core also provides a new interrupt functionality - the Interrupt Jump Cache - which allows the interrupt controller to transfer directly to the CPU a 24-bit start address for the service routine without time overhead.
Designed specifically for embedding in system-on-chip solutions, Super10 is a fully synthesizable design for process portability and can be combined with a variety of peripheral and interface IP for fast, effective system-on-chip design. Scalability allows the core to be optimized for specific applications. Currently available for ST's 0.18-micron technology, it can also be implemented with ST's robust, automotive grade embedded Flash memory technology.
The Super10 core can be operated at any speed from zero to 150MHz and is designed for low power consumption - 0.2 to 0.5mW/MHz - to suit portable applications such as digital still cameras, portable drives and personal digital assistants (PDAs).
Software tools are available from Tasking, which allow easy programming of Super10 cores in C and C++. In addition, application support and training are available. Real-time emulation is provided through ST's partnership with three leading third-party vendors, Nohau, Hitex and Lauterbach, which produce emulators based on ST's bond-out chips. An evaluation board is available from FS Forth and ETI.