Tokyo Institute of Technology and Fujitsu Achieve Wireless Transmission Speeds of 56 Gbps, World's Fastest
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Millimeter-waveband wireless device implemented in CMOS integrated circuit
TOKYO, Feb, 01 2016; Tokyo Institute of Technology and Fujitsu Laboratories Ltd. today announced that, in an effort to further enlarge the capacity of wireless equipment, they have developed a CMOS wireless transceiver chip that can process signals at high speeds with little loss across a broad range of frequencies, from 72 to 100 gigahertz (GHz). They also developed technology to modularize it. With these developments, they succeeded in achieving wireless transmission speeds of 56 Gigabits per second (Gbps), the world's fastest.
In recent years, to cope with the large increase in data traffic resulting from the widespread use of smartphones and other devices, networks that link base stations use optical fiber. One issue with this approach, however, is that it is difficult to expand service in areas where it is difficult to install a network of optical fiber cables, such as in urban areas or areas surrounded by rivers or mountains. To deal with this issue, Tokyo Institute of Technology and Fujitsu Laboratories have now developed high-speed wireless transceiver technologies that use the millimeter-waveband (30-300 GHz), where there are few competing wireless applications, and which are capable of large-capacity communications.
This technology makes it possible to have high-capacity wireless communications equipment that can be installed outdoors in applications where fiber-optic networks would be difficult to lay.
The details of this technology will be announced at the IEEE International Solid-State Circuits Conference 2016 (ISSCC 2016), the largest conference related to semiconductor technology, opening in San Francisco on January 31 (ISSCC Presentation Number 13.3).
Background
With sharp increases in data communications traffic resulting from the proliferation of smartphones, the expansion in the capacity of backbone networks - which connect wireless base stations to core networks, and base stations to each other - is accelerating. In the past, macro-cell base stations were mainly used, each of which can cover an area with several kilometers of range, but in recent years these have been supplemented with large quantities of small-cell base stations, each of which has a range of only a few hundred meters, to accommodate the increase in communications traffic.
Also, fiber-optic lines, which can transmit large volumes of data, are currently the most common way to handle communications between base stations. But laying new fiber-optic cables can be difficult in tightly packed urban areas, or in places hemmed in by mountains or rivers, so it has been hoped that high-capacity wireless equipment could be created that can easily be installed outdoors. Issues
High-capacity wireless transmissions need to use broad frequency ranges. This makes the use of the millimeter-waveband a suitable option, as few competing wireless applications use it. But because the millimeter-waveband uses such high frequencies, designing CMOS integrated circuits for that purpose has been a challenge, as the circuits need to be designed to operate near their limits. It has also been difficult to develop low-loss transceiver circuits that modulate and demodulate broadband signals into and out of the millimeter-waveband with high quality, and low-loss interface circuits, which connect the circuit board to the antenna.
About the Technology
The newly developed CMOS wireless transceiver chip and the wireless module that includes it (Figure 1*) are comprised of two key technologies.
1. Low-loss, high-bandwidth transceiver circuit
Tokyo Institute of Technology developed a technology for broadband, low-loss transceiver circuits in which data signals are split in two, with each converted to different frequency ranges, and then recombined (Figure 2*). Each signal is modulated into a band 10-GHz wide, with the low-band occupying the 72-82 GHz range, and the high-band occupying the 89-99 GHz range. This technology enables modulation on an ultra-wideband signal of 20 GHz, with low noise and a similar range in the ratio between input and output power as existing 10 GHz band methods, which results in high-quality signal transmissions.
Tokyo Institute of Technology also developed an amplifier to send and receive as radio waves signals converted to the millimeter-waveband. The ultra-wideband amplifier for 72 to 100 GHz was designed with circuit technologies that stabilize the amplification ratio by feeding the amplitude of the output signal back to the input side for signal components whose amplification ratio decreases based on frequency.
2. Modularization technology
The signal converted to the millimeter-waveband by the semiconductor chip is transported over the circuit board's signal path and supplied to the antenna. Because the antenna is made out of a waveguide (a metallic cylinder), there needs to be an ultra-wideband, low-loss connection between the printed circuit board and the waveguide. Fujitsu Laboratories and Tokyo Institute of Technology developed an interface between the circuit board and waveguide that uses a specially designed pattern of interconnects on the printed circuit board to adjust the impedance for the ultra-wideband range, enabling loss in the desired frequency range to be greatly reduced.
In this development project, Tokyo Institute of Technology was primarily responsible for reducing transceiver-circuit losses and developing broadband technologies, while Fujitsu Laboratories mainly handled modularization technologies.
Results
Indoor data-transfer tests were conducted, with two modules facing each other separated by a distance of 10 cm. These tests achieved data-transfer rates of 56 Gbps, the fastest wireless transmission speeds in the world, with loss of maximum 10% between the waveguide and circuit board.
By combining the technologies developed in this project with high-output amplifier technology, used to amplify the signal and increase the transport range, and baseband-circuit technology, used to process ultra-wideband signals, it is possible to increase the capacity of wireless equipment that can be installed outdoors.
By doing so, even in places where new fiber-optic lines are difficult to install, such as urban areas and places surrounded by mountains or rivers, a high-capacity wireless base station network can be deployed, thereby contributing to the provision of a comfortable communications environment in those places.
Future Plans
Fujitsu Laboratories aims to have a commercial implementation of wireless trunk lines for cellular base stations around 2020.
About Tokyo Institute of Technology
Tokyo Institute of Technology stands at the forefront of research and higher education as the leading university for science and technology in Japan. Tokyo Tech researchers excel in a variety of fields, such as material science, biology, computer science and physics. Founded in 1881, Tokyo Tech has grown to host 10,000 undergraduate and graduate students who become principled leaders of their fields and some of the most sought-after scientists and engineers at top companies. Embodying the Japanese philosophy of monotsukuri, meaning technical ingenuity and innovation, the Tokyo Tech community strives to make significant contributions to society through high-impact research. Please see http://www.titech.ac.jp/english
About Fujitsu Laboratories
Founded in 1968 as a wholly owned subsidiary of Fujitsu Limited, Fujitsu Laboratories Ltd. is one of the premier research centers in the world. With a global network of laboratories in Japan, China, the United States and Europe, the organization conducts a wide range of basic and applied research in the areas of Next-generation Services, Computer Servers, Networks, Electronic Devices and Advanced Materials. For more information, please see: http://jp.fujitsu.com/labs/en.
About Fujitsu Ltd
Fujitsu is the leading Japanese information and communication technology (ICT) company, offering a full range of technology products, solutions, and services. Approximately 159,000 Fujitsu people support customers in more than 100 countries. We use our experience and the power of ICT to shape the future of society with our customers. Fujitsu Limited reported consolidated revenues of 4.8 trillion yen (US$40 billion) for the fiscal year ended March 31, 2015. For more information, please see http://www.fujitsu.com.
Fujitsu and Socionext Develop Next-Generation 56 Gbps Transceiver Circuit with World's Lowest Power Consumption for Optical Communications between Servers
Doubles communications speed at current power level, contributing to higher performance in next-generation servers
Fujitsu Laboratories Ltd.,Socionext Inc.
Fujitsu Laboratories Ltd. and Socionext Inc. today announced that they have developed the world's lowest power-consuming transceiver circuit that achieves communications speeds of 56 Gbps per channel. Compared to previous levels, this essentially doubles the speed of data transfers between semiconductor chips, used in servers and switches, and optical modules.
There is an increasing need to accelerate data transfers between servers in response to improvements in the processing performance of datacenters; however, at the same time, limitations on the amount of electricity that facilities can supply mean that there is also a demand to lower electricity consumption.
Fujitsu Laboratories and Socionext have now developed a new timing detection method that combines the functions of the circuit that compensates signal degradation that becomes prominent as communication speeds improve with some of the functions of the timing-detection circuit that determines the bit-value of input signals, reducing the number of circuits. As a result, they succeeded in developing a 56 Gbps transceiver circuit that achieves twice the speed as before without raising power consumption.
This technology is able to increase the speed of data transfers between chips and optical modules without increasing power consumption, so it is expected to lead to performance improvements in next-generation servers and switches.
Details of this technology will be announced at the IEEE International Solid-State Circuits Conference 2016 (ISSCC 2016), the largest conference related to semiconductor technology, held from January 31 in San Francisco (ISSCC Presentation Number 3.5).
Development Background
In recent years, to support the rapidly expanding needs of cloud computing, there has been a demand for improvements in datacenter processing performance. Datacenters use numerous servers connected through switches to form a large-scale system, and as the processing ability of datacenters has improved, the volume of data exchanged between servers has also been further increasing.
For this reason, there has been progress in international standardization(1) of the communication speed of optical modules used for optical transmission between servers and switches for next-generation datacenters at 56 Gbps, twice current speeds.
At the same time, due to limitations on the amount of electricity that can be supplied in datacenters, there has been a demand for improvements in communication speed without increasing the amount of power consumed by data transceiver circuits.
Figure 1: Transceiver circuits connecting servers and switches
Issues
Power consumption increases proportionally with communication speed, making it necessary to decrease the power consumed by transceiver circuits in order to boost communication speed without increasing facility power.
In conventional transceiver circuits, the decision feedback equalizer (DFE), which is a circuit that compensates degraded signals, and the clock and data recovery (CDR) circuit, which detects timing errors between an incoming signal and the internal sampling clock, are responsible for about two thirds of the transceiver circuit's total power consumption, so reducing their power consumption has been a central issue.
For the input-signal waveform that became degraded in the transmission line, the bit value is determined at the determination circuits, one which has a +α threshold value and the other a -α threshold value. The DFE compensates the degraded signal by choosing the determination results of the +α determination circuit if the previous bit value processed was a 1, or the results of -α if the previous bit value processed was 0. The CDR, by observing the incoming signal, adjusts the DFE's operational timing to ensure it captures the signal when the incoming signal's waveform is at its greatest amplitude (Figure 2).
Figure 2: Existing transceiver circuit architecture and DFE compensation for signal degradation
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Newly Developed Technology
To reduce the power consumption of the CDR, Fujitsu Laboratories and Socionext have now developed a new timing error detection method.
By analyzing waveforms after DFE calculation, Fujitsu Laboratories and Socionext discovered that they could detect whether the DFE's operational timing was early or late by comparing the results of the two DFE determination circuits in cases where three consecutive bits in the input signal were 100 or 011. This led them to develop a new timing detection method that only detects the timing when three consecutive bits of the incoming signal are 100 or 011 (Figure 3).
Figure 3: New transceiver circuit architecture and timing adjustment with the new method
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With this newly developed timing detection method, the two companies were able to eliminate the previously required CDR incoming-signal timing-determination circuit, and lines, such as the clock line, which were required as the DFE and CDR operated with different timing. This made it possible for them to succeed in developing transceiver circuitry that doubles speeds to 56 Gbps with the same power consumption as before.
Effects
This new technology will be able to boost data transmission speeds between chips and optical modules without raising power consumption compared to the present. In addition, compatibility with upcoming OIF standards for optical module communications means that optical modules can be expected to be more compact and use less power, requiring half the number of transceiver circuits--from 16 to eight when using this technology--when constructing a 400 Gbps Ethernet with the current 28 Gbps standard.
Future Plans
Fujitsu Laboratories and Socionext will use the newly developed technology in interface components between optical modules and the chips of servers and switches, aiming for commercialization in fiscal 2018.
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[1] International standardization at 56 Gbps
Promoted by the Optical Internetworking Forum (OIF), an international standardization organization